Intel® FPGA SDK for OpenCL™ Pro Edition: Programming Guide

ID 683846
Date 10/04/2021

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Document Table of Contents

1.2. Intel® FPGA SDK for OpenCL™ FPGA Programming Flow

Applications using the Intel® FPGA SDK for OpenCL™ have two main components: the FPGA programming bitstream(s), and the host program that manages the application and FPGA accelerator.
Tip: If you are looking for information about oneAPI DPC++ FPGA programming flow, then refer to the Intel® oneAPI Programming Guide.
The Intel® FPGA SDK for OpenCL™ Offline Compiler first compiles your OpenCL kernels to an image file that the host program uses to program the FPGA. The host-side C compiler compiles your host program and then links it to the Intel® FPGA SDK for OpenCL™ runtime libraries.
Figure 1. Schematic Diagram of the Intel® FPGA SDK for OpenCL™ Programming Model

The following SDK components work together to program an Intel® FPGA:

  • The host application and the host compiler
  • The OpenCL kernel(s) and the offline compiler
  • The Custom Platform

The Custom Platform provides the board support package. Typically, the board manufacturer develops the Custom Platform that supports a specific OpenCL board. The offline compiler targets the Custom Platform when compiling an OpenCL kernel to generate a hardware programming image. The host then runs the host application, which usually programs and executes the hardware image onto the FPGA.

In a sequential implementation of a program (for example, on a conventional processor), the program counter controls the sequence of instructions that are executed on the hardware, and the instructions that execute on the hardware across time. In a spatial implementation of a program, such as program implementation within the Intel® FPGA SDK for OpenCL™ , instructions are executed as soon as the prerequisite data is available. Programs are interpreted as a series of connections representing the data dependencies.

Figure 2. FPGA Data Flow Architecture