AN 713: DC Coupling in Stratix V Devices

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ID 683790
Date 8/10/2015
Public
Document Table of Contents
Document Table of Contents x
1. DC-Coupling in Stratix V Devices
1. DC-Coupling in Stratix V Devices x
1.1. Stratix V DC-Coupling Scenarios 1.2. Document Revision History
1.1. Stratix V DC-Coupling Scenarios x
1.1.1. Connecting a Stratix V PCML Transceiver to Another Stratix V PCML Transceiver 1.1.2. Connecting a Stratix V PCML Transmitter to Another Stratix V LVDS Receiver 1.1.3. Connecting Stratix V PCML Transmitter to Another Altera PCML Receiver 1.1.4. Stratix V PCML Receiver to Another Altera PCML Transmitter 1.1.5. Stratix V PCML Transmitter to Non-Altera Device Receiver 1.1.6. Non-Altera Device Transmitter to Stratix V PCML Receiver
1. DC-Coupling in Stratix V Devices

1.1.6. Non-Altera Device Transmitter to Stratix V PCML Receiver

DC-coupling between a non-Altera transmitter to a Stratix V PCML receiver is supported if all the following conditions are satisfied:

  • Trace length is less than or equal to 3 inches
  • Channel loss is less than 4 dB
  • Data rate is less than or equal to 10.3125 Gbps
  • Application does not use backplanes or optical connectors

You must maintain the non-Altera transmitter common mode voltage within +/- 100 mV of the Altera Stratix V receiver.

Note: You can measure the transmitter common mode voltage at the transmitter pin using a DC multi-meter or a high impedance oscilloscope probe.

Contact Intel Premier Support, if your application requires the following conditions. In this case the minimum VID required for the Stratix V receiver will be higher than what is specified in the datasheet.

  • Trace length is more than 3 Gbps
  • Channel loss is more than 4 dB
  • Data rate is higher than 10.3125 Gbps
  • Application uses backplanes or optical connectors
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