Intel Agilex® 7 General-Purpose I/O User Guide: F-Series and I-Series

ID 683780
Date 10/31/2023
Public

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2.1.1. GPIO Bank Structure

Figure 2.  GPIO Bank Structure (Die Top View)This figure shows the GPIO bank structure of F-Series and I-Series devices. The figure shows the view of the die as shown in the Intel® Quartus® Prime Chip Planner. In the Pin Planner, this corresponds to the "Bottom View". Different device packages have different number of GPIO banks. Refer to the device pin-out files for available GPIO banks and the locations of the SDM shared and HPS shared GPIO banks for each device package.