Floating-Point IP Cores User Guide

ID 683750
Date 7/31/2024
Public

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12.3. ALTFP_SINCOS Resource Utilization and Performance

This table lists the resource utilization and performance information for the ALTFP_SINCOS IP core. The information was derived using the Quartus® Prime software version 10.1.
Table 69.  ALTFP_SINCOS Resource Utilization and Performance
Device Family Function Precision Output Latency Logic usage fMAX (MHz)
Adaptive Look-Up Tables (ALUTs) Dedicated Logic Registers (DLRs) Adaptive Logic Modules (ALMs) 18-Bit DSP
Stratix IV Sine Single 36 2,859 2,190 1,830 16 292.96
Cosine Single 35 2,753 2,041 1,745 16 258.26