Serial Lite IV Intel® FPGA IP Release Notes

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ID 683714
Date 5/10/2025
Public

1.5. Serial Lite IV Intel FPGA IP v1.3.1

Table 5.  v1.3.1 2021.04.01
Quartus® Prime Version Description Impact
21.1
  • Added the following new parameters:
    • Preserve unused transceiver channels for PAM4

      Turning on this parameter preserves unused transceiver channels for PAM4 mode.

    • Reference clock frequency for preserved channels

      Setting the clock frequency of reference clock for the unused preserved channels

  • Added new interface signal:
    • xcvr_ref_clk_1

      Transceiver reference clock used for preservation of unused transceiver channels. This clock is only applicable in PAM4 mode when you turn on Preserve unused transceiver channels for PAM4 in the IP parameter editor. In NRZ mode, this clock is available by default.

  • Updated the Transceiver data rate value for PAM4 mode in theSerial Lite IV IP parameter editor from 32.0 Gbps to 32.5 Gbps.
If you do not upgrade your IP, it does not have these new features.
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