Low Latency 40G Ethernet Intel® FPGA IP Release Notes

ID 683651
Date 4/14/2025
Public

1.2. Low Latency 40G Ethernet (intel_eth_e40) v5.0.0

Table 2.  v5.0.0 2025.01.27
Quartus® Prime Version Description Impact
24.3.1
  • Updated Select USER MAC mode parameter to Protocol Mode in IP GUI.
  • Added Enable JTAG to Avalon® Master Bridge as debug option in the IP GUI.
  • Added Enable VSR mode parameter in Analog Parameter tab of the IP GUI.
IP upgrade is required.