Intel® Quartus® Prime Pro Edition User Guide: Platform Designer
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4.3.8.3. Name HDL Signals for Automatic Interface and Type Recognition in the Platform Designer Component Editor
To enable auto-recognition, you must create signal names using the following naming convention:
<interface type prefix>_<interface name>_<signal type>
Specifying an interface name with <interface name> is optional if you have only one interface of each type in the component definition. For interfaces with only one signal, such as clock and reset inputs, the <interface type prefix> is also optional.
Interface Prefix | Interface Type |
---|---|
asi | Avalon® Streaming sink (input) |
aso | Avalon® Streaming source (output) |
avm | Avalon® memory-mapped host |
avs | Avalon® memory-mapped agent |
axm | AXI manager |
axs | AXI subordinate |
apm | APB manager |
aps | APB subordinate |
coe | Conduit |
csi | Clock Sink (input) |
cso | Clock Source (output) |
inr | Interrupt receiver |
ins | Interrupt sender |
ncm | Nios® II custom instruction master |
ncs | Nios® II custom instruction slave |
rsi | Reset sink (input) |
rso | Reset source (output) |
tcm | Avalon® TC host |
tcs | Avalon® TC agent |
Refer to the Avalon® Interface Specifications or the AMBA* Protocol Specification for the signal types available for each interface type.