RapidIO II Intel® FPGA IP Release Notes

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ID 683549
Date 9/28/2020
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Product Discontinuance Notification 1. RapidIO II Intel® FPGA IP Release Notes
1. RapidIO II Intel® FPGA IP Release Notes x
1.1. RapidIO II IP v19.2.0 1.2. RapidIO II Intel® FPGA IP v18.0 1.3. RapidIO II IP Core v17.1 1.4. RapidIO II IP Core v15.1 1.5. RapidIO II IP Core v14.1 1.6. RapidIO II IP Core v14.0 Arria 10 Edition 1.7. RapidIO II IP Core v14.0 1.8. RapidIO II IP Core v13.1 1.9. RapidIO II IP Core v13.0 1.10. RapidIO II IP Core User Guide Archives
Product Discontinuance Notification
1. RapidIO II Intel® FPGA IP Release Notes

1.4. RapidIO II IP Core v15.1

Table 4.  Version 15.1 November 2015
Description Impact Note
The RapidIO II IP core no longer supports 6.25 Gbaud, Avalon-ST pass-through variations that target the Arria V family on any -5 speed grade device. You must target a different Arria V device for these variations. —
If you connect your RapidIO II IP core to an Altera Transceiver PHY Reset Controller, added the requirement to set the RX_PER_CHANNEL parameter of the reset controller to the value of 1. — —
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