Generic Flash Programmer User Guide: Intel® Quartus® Prime Standard Edition

ID 683491
Date 3/28/2022
Public
Document Table of Contents

1.3.1.1. Step 1: Generate Primary Device Programming Files

The Intel® Quartus® Prime Assembler generates the .sof FPGA configuration file once design compilation is complete. Prior to running the Assembler, you can specify device and pin options that impact the .sof and subsequent .jic file generation.

Follow these steps to generate a .sof file for use in generic flash programming:

  1. Before running the Assembler, click Assignments > Device > Device & Pin Options to specify options for FPGA configuration pins and other hardware settings that the .sof file preserves. The following options are particularly relevant to generic flash programming. For option descriptions, refer to Device and Pin Options.
    • General tab—specify the JTAG user code, configuration clock source, and options for specific configuration pins.
    • Configuration tab—specify Active Serial or Active Serial x4 for the FPGA Configuration scheme. Select Auto for Configuration device I/O voltage, which you can specify with precision at a later time.
    Figure 4. Device & Pin Options Dialog Box
  2. To generate primary device programming files, click Processing > Start > Start Assembler. The Compiler confirms that prerequisite modules are complete, and launches the Assembler to generate the programming files.

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