AN 708: Application Note - PCI Express DMA Reference Design Using External Memory

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ID 683390
Date 5/17/2017
Public
Document Table of Contents
Document Table of Contents x
PCI Express DMA Reference Design Using External Memory
PCI Express DMA Reference Design Using External Memory x
Deliverables Included with the Reference Design Project Hierarchy Avalon-MM DMA Controller Reference Design DMA Operation Flow Running the Reference Design Understanding PCI Express Throughput Document Revision History
Project Hierarchy x
Parameter Settings for PCI Express Hard IP Variation
Running the Reference Design x
Installing the Driver and Application Installing the Windows Software Installing the Hardware Running the Linux DMA Software Running the Windows DMA Software
Understanding PCI Express Throughput x
Throughput for Posted Writes Throughput for Reads
Throughput for Posted Writes x
Specifying the Maximum Payload Size
PCI Express DMA Reference Design Using External Memory

Deliverables Included with the Reference Design

The reference design includes the following components:

  • Linux and Windows applications and drivers configured specifically for this reference design. Arria® V and Cyclone® V support Linux applications and drivers. Intel® Arria® 10 and Stratix® V support Linux as well as Windows applications and drivers.
  • FPGA programming files for the Arria V, Arria® 10 , Cyclone® V , or Stratix® V FPGA Development kits
  • Quartus® Prime Archive Files (. qar) for the development kits, including an SRAM Object File (. sof) and SignalTap® files (.stp)
  • An Application Layer which is an Avalon-MM DMA example design generated in Qsys
Level Two Title