F-Tile Avalon® Streaming Intel® FPGA IP for PCI Express* Design Example User Guide

ID 683372
Date 4/07/2025
Public
Document Table of Contents

3.5. Hardware and Software Requirements

Below are the hardware and software used to generate the test result as shown in Running the Design Example.

Hardware:
  • Intel Ice Lake Server with 8 DDR4-3200 8GB RDIMMs installed as the host system
  • Agilex™ 7 F-Series F-Tile FPGA Development Kit
Note:

The Agilex™ 7 F-Series F-Tile FPGA Development Kit is configured to use the local 100MHz clock source for PCIe (SW4.3 is set to OFF) by default. You may observe an unstable PCIe link when testing the design example on hardware if your host system has the Spread Spectrum Clocking (SSC) feature enabled by default. The common clock source is recommended to get around the problem. This can be done by changing SW4.3 to ON to use the clock source from the host system,

Software:
  • Quartus® Prime Pro Edition Software version 25.1 and later
  • Linux distribution with Kernel version up to 5.15
  • Ubuntu 22.04.3 LTS (Kernel: 5.15.0-97-generic).
  • Software driver generated along with the design example