6.3. Loop Coalescing (loop

Intel® High Level Synthesis Compiler Pro Edition: Reference Manual

Download PDF

ID 683349

Date 12/13/2021

Version

Public

A newer version of this document is available. Customers should click here to go to the newest version.

Visible to Intel only — GUID: yyy1489604310598

Ixiasoft

View Details

6.3. Loop Coalescing (loop_coalesce Pragma)

Use the loop_coalesce pragma to direct the Intel® HLS Compiler to coalesce nested loops into a single loop without affecting the loop functionality. Coalescing loops can help reduce your component area usage by directing the compiler to reduce the overhead needed for loop control.

Coalescing nested loops also reduces the latency of the components, which can further reduce your component area usage. However, in some cases, coalescing loops might lengthen the critical loop initiation interval path, so coalescing loops might not be suitable for all components.

To coalesce nested loops, specify the pragma as follows:

#pragma loop_coalesce <loop_nesting_level>

The <loop_nesting_level> parameter is optional and is an integer that specifies how many nested loop levels that you want the compiler to attempt to coalesce. If you do not specify the <loop_nesting_level> parameter, the compiler attempts to coalesce all of the nested loops.

For example, consider the following set of nested loops:

for (A)
  for (B)
    for (C)
      for (D)
    for (E)

If you place the pragma before loop (A), then the loop nesting level for these loops is defined as:

Loop (A) has a loop nesting level of 1.
Loop (B) has a loop nesting level of 2.
Loop (C) has a loop nesting level of 3.
Loop (D) has a loop nesting level of 4.
Loop (E) has a loop nesting level of 3.

Depending on the loop nesting level that you specify, the compiler attempts to coalesce loops differently:

If you specify #pragma loop_coalesce 1 on loop (A), the compiler does not attempt to coalesce any of the nested loops.
If you specify #pragma loop_coalesce 2 on loop (A), the compiler attempts to coalesce loops (A) and (B).
If you specify #pragma loop_coalesce 3 on loop (A), the compiler attempts to coalesce loops (A), (B), (C), and (E).
If you specify #pragma loop_coalesce 4 on loop (A), the compiler attempts to coalesce all of the loops [loop (A) - loop (E)].

To learn more about the effects of applying the loop_coalesce loop pragma, review the following tutorial:

<quartus_installdir>/hls/examples/tutorials/best_practices/loop_coalesce

Example

The following simple example shows how the compiler coalesces two loops into a single loop.

Consider a simple nested loop written as follows:

#pragma loop_coalesce
for (int i = 0; i < N; i++)
  for (int j = 0; j < M; j++)
    sum[i][j] += i+j;

The compiler coalesces the two loops together so that they run as if they were a single loop written as follows:

int i = 0;
int j = 0;
while(i < N){
  
  sum[i][j] += i+j;
  j++;

  if (j == M){
    j = 0;
    i++;
  }
}

Select Your Language

Using Intel.com Search

Quick Links

Recent Searches

Advanced Search

Only search in

Intel® High Level Synthesis Compiler Pro Edition: Reference Manual

6.3. Loop Coalescing (loop_coalesce Pragma)

Example