1.4.1. Configuration Status Command
The sdm_config_status <device_index> command provides information about the device configuration state, the status of the various configuration pins, and the MSEL pin setting on your device. If you connected a single SDM device, the device index is an optional parameter. If you connected multiple SDM devices and your target device is other than the device #1, you must specify the device index.
The following examples are the expected output of executing the sdm_config_status function.
Identifying Successful Configuration using sdm_config_status
$sdm_config_statusMSEL[2:0] : 011 (AS (Normal POR))
Configuration pin signals:
nSTATUS : 1
nCONFIG : 1
CONF_DONE : 1
INIT_DONE : 1
CvP_DONE : 0
SEU_ERROR : 0
HPS_WARMRESET : 0
HPS_COLDRESET : 0
MSEL[2:0] Table:
3'b000 AvST x32
3'b101 AvST x16
3'b110 AvST x8
3'b001 AS (Fast POR)
3'b011 AS (Normal POR)
3'b111 JTAG onlyIdentifying Failed Configuration using sdm_config_status
$sdm_config_status
MSEL[2:0] : 011 (AS (Normal POR))
Configuration pin signals:
nSTATUS : 1
nCONFIG : 1
CONF_DONE : 0
INIT_DONE : 0
CvP_DONE : 0
SEU_ERROR : 0
HPS_WARMRESET : 0
HPS_COLDRESET : 0
MSEL[2:0] Table:
3'b000 AvST x32
3'b101 AvST x16
3'b110 AvST x8
3'b001 AS (Fast POR)
3'b011 AS (Normal POR)
3'b111 JTAG only
State : 0xf0010040
Error location : 0x0000c400
Error detail : 0x00000003
Configuration fail!
Major code: 0xF001
Bitstream error, usually due to unsigned bitstream used.
Minor code: 0x0040
Config clock PLL fail error detection, ensure OSC_CLK_1 clock source free running and stable.You may need to provide the device_index argument for multiple detected devices. If you select device #1, the device_index is an optional argument with 1 as a default value. If you select a target device different from device #1, you must specify device_index argument. In this example, 1 is device #1 identified using the sdm_device_list command.
The example below shows the command with selected device #2.
%sdm_config_status 2
Note: For latest information about error codes updates, refer to the Mailbox Client Intel® FPGA IP User Guide.