Quartus® Prime Pro Edition Settings File Reference Manual
Visible to Intel only — GUID: raa1528324508597
Ixiasoft
Visible to Intel only — GUID: raa1528324508597
Ixiasoft
1.3.114. VERILOG_INPUT_VERSION
Specifies the language dialect to use when processing Verilog Design Files: Verilog-1995 (IEEE Std. 1364-1995), Verilog-2001 (IEEE Std. 1364-2001), SystemVerilog-2005 (IEEE Std. 1800-2005), or SystemVerilog-2009 (IEEE Std. 1800-2009). Verilog 2001 is the default dialect.
Type
Enumeration
Values
- SystemVerilog_2005
- SystemVerilog_2009
- Verilog_1995
- Verilog_2001
Device Support
- This setting can be used in projects targeting any Intel FPGA device family.
Notes
This assignment is included in the Analysis & Synthesis report.
Syntax
set_global_assignment -name VERILOG_INPUT_VERSION <value>
Default Value
Verilog_2001