HDMI Arria® 10 FPGA IP Design Example User Guide

ID 683156
Date 4/29/2024
Public
Document Table of Contents

2.8. Running the Design in Different FRL Rates

You may run your design in different FRL rates, other than the external sink's default FRL rate.

To run the design in different FRL rates:

  1. Toggle the on-board user_dipsw0 switch to ON position.
  2. Open the Nios® V command shell, then type juart-terminal.
  3. Key in the following commands and press Enter to execute.
Command Description
h Show the help menu.
r0 Update the RX maximum FRL capability to FRL rate 0 (TMDS only).
r1 Update the RX maximum FRL capability to FRL rate 1 (3 Gbps).
r2 Update the RX maximum FRL capability to FRL rate 2 (6 Gbps, 3 lanes).
r3 Update the RX maximum FRL capability to FRL rate 3 (6 Gbps, 4 lanes).
r4 Update the RX maximum FRL capability to FRL rate 4 (8 Gbps).
r5 Update the RX maximum FRL capability to FRL rate 5 (10 Gbps).
r6 Update the RX maximum FRL capability to FRL rate 6 (12 Gbps).
t1 TX configures link rate to FRL rate 1 (3 Gbps).
t2 TX configures link rate to FRL rate 2 (6 Gbps, 3 lanes).
t3 TX configures link rate to FRL rate 3 (6 Gbps, 4 lanes).
t4 TX configures link rate to FRL rate 4 (8 Gbps).
t5 TX configures link rate to FRL rate 5 (10 Gbps).
t6 TX configures link rate to FRL rate 6 (12 Gbps).