188.8.131.52. Data Parallelism
Traditional instruction-set-architecture-based (ISA-based) accelerators, such as GPUs, derive data parallelism from vectorized instructions and by executing the same operation on multiple processing units.
In comparison, FPGAs derive their performance by taking advantage of their spatial architecture. FPGA compilers do not require you to vectorize your code. The compiler vectorizes your code automatically whenever it can.
Did you find the information on this page useful?