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Ixiasoft
1.1. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v14.0.1
1.2. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v14.0.0
1.3. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v13.0.0
1.4. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v12.0.0
1.5. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v11.0.0
1.6. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v10.0.0
1.7. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v8.0.0
1.8. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v7.0.0
1.9. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v6.0.0
1.10. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v5.0.0
1.11. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v4.0.0
1.12. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v3.0.0
1.13. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v2.0.0
1.14. F-Tile Ethernet Intel® FPGA Hard IP User Guide Archives
1.15. F-Tile Ethernet Intel® FPGA Hard IP Design Example User Guide Archives
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Ixiasoft
1.10. F-Tile Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP v5.0.0
| Quartus® Prime Version | Description | Impact |
|---|---|---|
| 22.1 | Added a new support_logic directory structure. | When generating a design example, the hardware_test_design includes the new directory. |
| Added FHT NRZ hardware support. | Both FHT PAM4 and FHT NRZ now provide hardware support. | |
| Added a new synthesis-related parameter: IP-XACT | When enabled, generates the .ipxact files. | |
Added support for the VHDL file format in the following simulators:
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