AN 831: Intel® FPGA SDK for OpenCL™: Host Pipelined Multithread

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ID 683013
Date 11/20/2017
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1. Intel® FPGA SDK for OpenCL™ Host Pipelined Multithread

In this document, a new pipelined framework for high throughput design is proposed. This framework is optimal for processing large input data through algorithms, where data dependency forces sequential execution of all stages or tasks of the algorithm.

Section Content
Introduction
Pipelining Framework for High Throughput Design
Optimization Techniques for CPU Tasks
Design Example: Data Compression Algorithm
Document Revision History

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