DE10-Nano Board Schematic

Published: 02/03/2017  

Last Updated: 02/03/2017

Figure below shows the block diagram of the DE10-Nano development board. Connections are made through the Cyclone V* SoC FPGA. See attached PDF for full schematic details.

block diagram

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de10-nano-schematic.pdf 1.4 MB

Product and Performance Information

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Performance varies by use, configuration and other factors. Learn more at www.Intel.com/PerformanceIndex.