Arria® 10 FPGA – Simple Socket Server for the Nios® V/g Processor Design Example

Arria® 10 FPGA – Simple Socket Server for the Nios® V/g Processor Design Example

837391
10/28/2024

Introduction

This design example demonstrates communication with a telnet client on a development host PC

Design Details

Device Family

Intel® Arria® 10 SX 660 FPGA 10AS066N3F40E2SG

Quartus Edition

Intel® Quartus® Prime Pro Edition

Quartus Version

24.2

Other Tags

Validated in Quartus and Board

IP Cores (3)
IP Core IP Core Category
Nios V/g Processor Intel FPGA IP Embedded Processor
Triple-Speed Ethernet Intel FPGA IP Ethernet
Transceiver ATX PLL Intel Arria 10/Cyclone 10 FPGA IP Transceiver PLL

Detailed Description

The telnet client offers a convenient way of issuing commands over a TCP/IP socket to the Ethernet-connected μC/TCP-IP running on the development board with a simple TCP/IP socket server example. The socket server example receives commands sent over a TCP/IP connection and turns LEDs on and off according to the commands. The example consists of a socket server task that listens for commands on a TCP/IP port and dispatches those commands to a set of LED management tasks.




Please refer to the document for details about the design.

Prepare the design template in the Quartus Prime software GUI

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. You can simply double click on the <project>.par file and Quartus will launch that project.

Design Details

Device Family

Intel® Arria® 10 SX 660 FPGA 10AS066N3F40E2SG

Quartus Edition

Intel® Quartus® Prime Pro Edition

Quartus Version

24.2

Other Tags

Validated in Quartus and Board