Arria® 10 FPGA – Bootloader GSFI for the Nios® V/m Processor Design Example

Arria® 10 FPGA – Bootloader GSFI for the Nios® V/m Processor Design Example

837383
10/28/2024

Introduction

The Nios® V processor application is copied from the configuration QSPI flash to RAM using the boot copier i.e., Generic Serial Flash Interface (GSFI) bootloader

Design Details

Device Family

Intel® Arria® 10 SX 660 FPGA 10AS066N3F40E2SG

Quartus Edition

Intel® Quartus® Prime Pro Edition

Quartus Version

24.2

Other Tags

Validated in Quartus and Board

IP Cores (2)
IP Core IP Core Category
Nios V/m Processor Intel FPGA IP Embedded Processor
Generic Serial Flash Interface Intel FPGA IP Configuration And Programming

Detailed Description

The GSFI bootloader is the Nios V processor boot copier that supports QSPI flash memory in control block-based devices.

The GSFI bootloader includes the following features:

  • 1. Locates the software application in non-volatile memory.
  • 2. Unpacks and copies the software application image to RAM.
  • 3. Automatically switches processor execution to application code in RAM after copy completes.



Please refer to the document for details about the design.

Prepare the design template in the Quartus Prime software GUI

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. You can simply double click on the <project>.par file and Quartus will launch that project.

Design Details

Device Family

Intel® Arria® 10 SX 660 FPGA 10AS066N3F40E2SG

Quartus Edition

Intel® Quartus® Prime Pro Edition

Quartus Version

24.2

Other Tags

Validated in Quartus and Board