Intel® Arria® 10 FPGA – 10GBASE-KR PHY IP Design Example

Intel® Arria® 10 FPGA – 10GBASE-KR PHY IP Design Example

784689
7/31/2023

Introduction

The Intel® Arria® 10 FPGA 10GBASE-KR PHY IP design example provides a simulation testbench and a hardware design example that supports simulation and hardware testing.

Design Details

Device Family

Intel® Arria® 10 GX FPGA

Quartus Edition

Intel® Quartus® Prime Pro Edition

Quartus Version

22.3

IP Cores (6)
IP Core IP Core Category
IOPLL Intel FPGA IP PLL
1G/10GbE and 10GBASE-KR PHY Intel Arria 10 FPGA IP 10G to 1G Multi-rate Ethernet
Transceiver ATX PLL Intel Arria 10/Cyclone 10 FPGA IP Transceiver PHY
fPLL Intel Arria 10/Cyclone 10 FPGA IP Transceiver PLL
Transceiver PHY Reset Controller Intel FPGA IP Transceiver PHY
JTAG to Avalon Master Bridge Intel FPGA IP Memory Mapped

Detailed Description

Prepare the design template in the Quartus Prime software GUI

Note: After downloading the design example, you must prepare the design template. The file you downloaded is of the form of a <project>.par file which contains a compressed version of your design files (similar to a .qar file) and metadata describing the project. The combination of this information is what constitutes a <project>.par file. You can simply double click on the <project>.par file and Quartus will launch that project.


The second means to bring up the project template is through the New Project Wizard (File -> New Project Wizard). After entering the project name and folder on the first panel, the second panel will ask you to specify an empty project or project template. Select project template. You will see a list of Design Templates projects that you have loaded prior as well as various "Baseline Pinout Designs" that contain the pinout and settings for a variety of development kits. If you don't see your design template in the list, click on the link that states install the Design Templates circled below:



Browse to the <project>.par file you downloaded, click next, followed by Finish, and your design template will be installed and displayed in the Project Navigator pane in Quartus.


Note: When a design is stored in the Design Store as a design template, it has been previously regression tested against the stated version of Quartus software. The regression ensures the design template passes analysis/synthesis/fitting/assembly steps in the Quartus design flow.


Prepare the design template in the Quartus Prime software command-line

At the command-line, type the following command:

quartus_sh --platform_install -package <project directory>/<project>.par


Once the process completes, then type:

quartus_sh --platform -name <project>

Design Details

Device Family

Intel® Arria® 10 GX FPGA

Quartus Edition

Intel® Quartus® Prime Pro Edition

Quartus Version

22.3