Arria® 10 FPGA – μC/OS-II* RTOS with IPerf for the Nios® V/m Processor Design Example

Arria® 10 FPGA – μC/OS-II* RTOS with IPerf for the Nios® V/m Processor Design Example

776158
4/8/2023
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Introduction

Perf 2 is a benchmarking tool for measuring performance between two systems and it can be used as a server or a client.

Development Kit

Intel® Arria® 10 SX SoC Development Kits

Design Details

Device Family

Intel® Arria® 10 SX SoC FPGA
Quartus Edition

Intel® Quartus® Prime Pro Edition
Quartus Version

23.1
Other Tags

Validated in Quartus and Board
IP Cores (3)
IP Core IP Core Category
Nios V/m Processor Intel FPGA IP Embedded Processor
Triple-Speed Ethernet Intel FPGA IP Ethernet
altera_msgdma DMA

Detailed Description

An iPerf server receives an iPerf request sent over a TCP/IP connection from any iPerf clients and runs the iPerf test according to the provided arguments. Each test reports the bandwidth, loss, and other parameters.



Development Kit

Intel® Arria® 10 SX SoC Development Kits

Design Details

Device Family

Intel® Arria® 10 SX SoC FPGA
Quartus Edition

Intel® Quartus® Prime Pro Edition
Quartus Version

23.1
Other Tags

Validated in Quartus and Board