Agilex™ 5 Auto-Negotiation and Link Training for Ethernet Intel® FPGA IP Register Map

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Agilex™ 5 FPGA D-Series and E-Series FPGA Documentation Index Agilex™ 5 E-Series FPGA and SoC FPGA Support Agilex™ 5 FPGA and SoC FPGA D-Series Support

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2025-01-17
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Description

The GTS AN/LT IP contains a hardened AN/LT protocol stack and synthesizable soft logic. It supports up to 25Gbps data rate with various RS-FEC types.

Usage instructions