Debugging Nios® II Systems with the Signal Tap Logic Analyzer Application Note

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FPGA Documentation Index Nios® II Processors Support Altera® FPGA IP Resource and Documentation Collection Altera® FPGA IP Resource and Documentation Collection

654956
2011-06-04
Public

Description

This application note guides you to debug your system design using dynamic information provided during software execution by the Nios® II processor. A short tutorial demonstrates how to use the Nios II plug-in, Signal Tap logic analyzer, and Nios II Software Build Tools (SBT) for Eclipse to trigger on, capture, and trace the signals which illuminate the LEDs.

Usage instructions