ALTDLL and ALTDQ_DQS IP Cores User Guide

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Stratix® III FPGA Support Altera® FPGA IP Resource and Documentation Collection Altera® FPGA IP Resource and Documentation Collection Arria® II FPGA Support Stratix® IV FPGAs Support

654575
2012-02-05
Public

Description

The ALTDLL and ALTDQ_DQS IP Cores provide a custom external memory interface solution to access an FPGA's architecture and allow you to build your own custom external memory interface PHY blocks. The ALTDLL IP Core configures the dedicated DQS phase-shift circuitry, while the ALTDQ_DQS IP Core implements the read and write PHY required for the interface.

Usage instructions