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  • Brand Name: Core Ultra

  • Product Number: 6526Y

  • Ordering Code: PK8072205559500

  • SPEC Code: SRN6N

  • Code Name: Emerald Rapids

Stratix® V 5SEEB FPGA

Specifications

Export specifications

Essentials

I/O Specifications

Package Specifications

Supplemental Information

Ordering and Compliance

Ordering and spec information

Stratix® V 5SEEB FPGA 5SEEBF45C2G

  • MM# 99A1J6
  • Spec Code SRJHJ
  • Ordering Code 5SEEBF45C2G
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 725303

Stratix® V 5SEEB FPGA 5SEEBF45C3G

  • MM# 99A1J8
  • Spec Code SRJHL
  • Ordering Code 5SEEBF45C3G
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 725389

Stratix® V 5SEEB FPGA 5SEEBF45C4G

  • MM# 99A1J9
  • Spec Code SRJHM
  • Ordering Code 5SEEBF45C4G
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 725202

Stratix® V 5SEEB FPGA 5SEEBF45I2G

  • MM# 99A1JA
  • Spec Code SRJHN
  • Ordering Code 5SEEBF45I2G
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 725107

Stratix® V 5SEEB FPGA 5SEEBF45I3G

  • MM# 99A1JD
  • Spec Code SRJHQ
  • Ordering Code 5SEEBF45I3G
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 725548

Stratix® V 5SEEB FPGA 5SEEBF45I4G

  • MM# 99A1JH
  • Spec Code SRJHS
  • Ordering Code 5SEEBF45I4G
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 725812

Retired and discontinued

Stratix® V 5SEEB FPGA 5SEEBF45C4N

  • MM# 969142
  • Spec Code SR7P1
  • Ordering Code 5SEEBF45C4N
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 692605

Stratix® V 5SEEB FPGA 5SEEBF45I2L

  • MM# 969143
  • Spec Code SR7P2
  • Ordering Code 5SEEBF45I2L
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 701241

Stratix® V 5SEEB FPGA 5SEEBH40C3N

  • MM# 969145
  • Spec Code SR7P4
  • Ordering Code 5SEEBH40C3N
  • Stepping A1
  • ECCN 3A991
  • CCATS NA
  • MDDS Content IDs 691527

Stratix® V 5SEEB FPGA 5SEEBF45C2LN

  • MM# 969760
  • Spec Code SR866
  • Ordering Code 5SEEBF45C2LN
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 702711

Stratix® V 5SEEB FPGA 5SEEBF45I3NYY

  • MM# 969761
  • Spec Code SR867
  • Ordering Code 5SEEBF45I3NYY
  • Stepping A1
  • ECCN 3A001.A.7.A
  • CCATS G171972
  • MDDS Content IDs 700715

Stratix® V 5SEEB FPGA 5SEEBH40I2L

  • MM# 970661
  • Spec Code SR8W8
  • Ordering Code 5SEEBH40I2L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA
  • MDDS Content IDs 700103

Stratix® V 5SEEB FPGA 5SEEBH40I3L

  • MM# 970662
  • Spec Code SR8W9
  • Ordering Code 5SEEBH40I3L
  • Stepping A1
  • ECCN 3A991
  • CCATS NA
  • MDDS Content IDs 696258

Trade compliance information

  • ECCN Varies By Product
  • CCATS Varies By Product
  • US HTS 8542390001

PCN Information

SRJHM

SRJHN

SR7P4

SR8W9

SRJHQ

SR7P2

SR867

SR8W8

SR7P1

SR866

SRJHS

SRJHJ

SRJHL

Drivers and Software

Latest Drivers & Software

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Launch Date

The date the product was first introduced.

Lithography

Lithography refers to the semiconductor technology used to manufacture an integrated circuit, and is reported in nanometer (nm), indicative of the size of features built on the semiconductor.

Logic Elements (LE)

Logic elements (LEs) are the smallest units of logic in Intel® FPGA architecture. LEs are compact and provide advanced features with efficient logic usage.

Adaptive Logic Modules (ALM)

The adaptive logic module (ALM) is the logic building block in supported Intel FPGA devices, and is designed to maximize both performance and utilization. Each ALM has several different modes of operation, and can implement a variety of different combinatorial and sequential logical functions.

Adaptive Logic Module (ALM) Registers

ALM registers are those register bits (flip-flops) that are contained inside the ALMs and are used to implement sequential logic.

Fabric and I/O Phase-Locked Loops (PLLs)

Fabric and IO PLLs are used to simplify the design and implementation of the clock networks in the Intel FPGA fabric, and also the clock networks associated with the IO cells in the device.

Maximum Embedded Memory

The total capacity of all the embedded memory blocks in the programmable fabric of the Intel FPGA device.

Digital Signal Processing (DSP) Blocks

The digital signal processing (DSP) block is the mathematical building block in supported Intel FPGA devices and contains high-performance multipliers and accumulators to implement a variety of digital signal processing functions.

Digital Signal Processing (DSP) Format

Depending on the Intel FPGA device family, the DSP block supports different formats such as hard floating point, hard fixed point, multiply and accumulate, and multiply only.

Hard Memory Controllers

Hard memory controllers are used to enable high-performance external memory systems attached to the Intel FPGA. A hard memory controller saves power and FPGA resources compared to the equivalent soft memory controller, and supports higher frequency operation.

External Memory Interfaces (EMIF)

The external memory interface protocols supported by the Intel FPGA device.

Maximum User I/O Count†

The maximum number of general purpose I/O pins in the Intel FPGA device, in the largest available package.
† Actual count could be lower depending on package.

I/O Standards Support

The general purpose I/O interface standards supported by the Intel FPGA device.

Maximum LVDS Pairs

The maximum number of LVDS pairs that can be configured in the Intel FPGA device, in the largest available package. Refer to device documentation for actual RX and TX LVDS pairs count by package type.

Package Options

Intel FPGA devices are available in different package sizes, with different IO and transceiver counts, to match customer system requirements.

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All information provided is subject to change at any time, without notice. Intel may make changes to manufacturing life cycle, specifications, and product descriptions at any time, without notice. The information herein is provided "as-is" and Intel does not make any representations or warranties whatsoever regarding accuracy of the information, nor on the product features, availability, functionality, or compatibility of the products listed. Please contact system vendor for more information on specific products or systems.

Intel classifications are for general, educational and planning purposes only and consist of Export Control Classification Numbers (ECCN) and Harmonized Tariff Schedule (HTS) numbers. Any use made of Intel classifications are without recourse to Intel and shall not be construed as a representation or warranty regarding the proper ECCN or HTS. Your company as an importer and/or exporter is responsible for determining the correct classification of your transaction.

Refer to Datasheet for formal definitions of product properties and features.

‡ This feature may not be available on all computing systems. Please check with the system vendor to determine if your system delivers this feature, or reference the system specifications (motherboard, processor, chipset, power supply, HDD, graphics controller, memory, BIOS, drivers, virtual machine monitor-VMM, platform software, and/or operating system) for feature compatibility. Functionality, performance, and other benefits of this feature may vary depending on system configuration.

“Announced” SKUs are not yet available. Please refer to the Launch Date for market availability.