Article ID: 000076804 Content Type: Product Information & Documentation Last Reviewed: 03/26/2013

How do IBIS models relate to device speed grades?

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Description

Altera® IBIS models contain three types of conditions to represent I/O performance across process, voltage, and temperature (PVT) variation.  These are also referred to as PVT corners. However, the three PVT corners do not represent the full range of performance for each of the available device speed grades, instead, they represent the full range of performance for the device family.  The three conditions modeled in IBIS are:

  • Fast-Strong are best case conditions
    • Fast silicon
    • High voltage
    • Low temperature
  • Typical are nominal conditions
    • Typical silicon
    • Nominal voltage
    • Room temperature
  • Slow-Weak are worst case conditions
    • Slow silicon
    • Low voltage
    • High temperature

Within each speed grade, there is process variation as well.  The fast-strong IBIS model represents the fastest silicon possible, but is not completely representative of performance for fast speed grade devices since the fast-strong model does not show the slowest performance of the fast speed grade devices.

For fast and middle speed grade devices, you cannot sweep all of the process, voltage, and temperature conditions with IBIS models.  I/O performance is dependent on the device speed grade.  Your design may use a maximum rate output in a fast speed grade device, and then find it cannot operate at that rate when using the slow-weak model conditions.  This is because the slow-weak model has the slowest silicon, which does not apply to a fast speed grade device.  Thus, you should not use the slow-weak model to simulate fast speed grade device I/O performance.

To better determine the worst case conditions for a fast speed grade device, you can use the typical model, as this will bound the process variation.  However, the typical model is also at nominal voltage and nominal temperature, so this does not represent the worst case environmental conditions the device may be exposed to during operation.

When simulating for slow speed grade devices, you should use all three model corners since slow speed grade devices can have silicon that performs anywhere within the fast and slow models.  This is similar to performing multi-corner timing analysis, you will see larger performance variation with slow speed grade devices than with fast speed grade devices.

These limitations need to be considered when simulating with IBIS models.

For a more accurate representation of how environmental conditions such as voltage and temperature affect the three process corners, you can use HSPICE models and the appropriate simulation tools. HSPICE allows you to vary the voltage and temperature conditions separately for each process corner.

When you generate IBIS or HSPICE models in the Quartus® II software for your project, the generated files represent the I/O usage in your design. The files are independent of the device speed grade and will include the PVT corners that represent the entire device family across all speed grades.  

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