Incremental Compilation Resource Center
The Intel® Quartus® Prime software incremental compilation feature is the most productive incremental design methodology for high-density FPGAs. It reduces compilation times by up to 70 percent while preserving the results of unchanged logic in your design.
To search for known incremental compilation issues and technical support solutions, use Intel's knowledge database. You can also visit the Intel community site to discuss technical issues with other Intel users.
For further technical support, use mySupport to create, view, and update service requests.
Incremental Compilation Resources
Table 1 provides links to available documentation on incremental compilation.
Table 1. Incremental Compilation Documentation
Title |
Description |
|---|---|
Increasing productivity with Quartus® II incremental compilation (PDF) |
This paper describes how an incremental compilation flow can improve your productivity when designing for high-density, high-performance FPGAs. |
This user guide describes block-based design flows, also known as modular or hierarchical design flows. These advanced flows enable the preservation of design blocks (or logic comprising a hierarchical design instance) within a project, and reuse of design blocks in other projects. |
Table 2 provides links to available training and demonstrations on incremental compilation.
Table 2. Incremental Compilation Training and Demonstrations
Title |
Description |
|---|---|
OIBBC100 -- Incremental block-based design compilation in the Intel Quartus Prime Pro software: Introduction (23 min online course) |
In this training, you will learn about incremental block-based compilation, the ability to partition your design and choose which parts should be reused in subsequent compilations. (Part 1 of 3) |
OIBBC101 - Incremental block-based design compilation in the Intel Quartus Prime Pro software: Design Partitioning (43 min online course) |
This part of the training goes into detail on how to plan for design partitioning, guidelines for creating good partitions, and the Intel Quartus Prime software tools used. (Part 2 of 3) |
OIBBC102 - Incremental block-based design compilation in the Intel Quartus Prime Pro software: Timing Closure and Tips (22 min online course) |
This final part of the training provides general tips and tricks as well as a methodology for using the feature to close timing. |
OBBDR100 - Design block reuse in the Intel Quartus Prime Pro software (44 min online course) |
This training covers design block reuse, the ability to partition your design, and provide parts of it to other projects or integrate complete or incomplete parts into your project. |