OpenCL™ Vector Addition Design Example

Recommended for:

  • Device: Unknown

  • Quartus®: v17.1



This example is an introductory example that uses an Open Computing Language (OpenCL) kernel to compute the addition of two N-element vectors. The output is verified against a golden reference computed on the host CPU.

In addition to demonstrating basic OpenCL application programming interface (API) functionality, this example shows how to partition a large problem across multiple OpenCL devices. If there are M available devices, the host program divides the problem such that each device computes the results for N / M elements.


  • Basic OpenCL API
  • Multiple device partitioning
  • OpenCL events and event profiling


The design example provides source code for the OpenCL device (.cl) as well as the host application. For compiling the host application, the Linux* package includes a Makefile and the Windows package includes a Microsoft Visual Studio 2010 project.

The following downloads are provided for this example:

The use of this design is governed by, and subject to, the terms and conditions of the hardware reference design license agreement.

Software and Hardware Requirements

This design example requires the following tools:

  • Intel® FPGA software v17.1 or later
  • Intel FPGA SDK for OpenCL v17.1 or later
  • On Linux: GNU Make and gcc
  • On Windows: Microsoft Visual Studio 2010
  • To compile to arm32 architecture, also get SoC EDS v17.0 or later.
    • For Windows, you will need gmake.
    • VisualStudio project cannot compile to arm32.

To download the Intel design tools, visit the OpenCL download page. The requirements for the underlying operating system are the same as those of the Intel FPGA SDK for OpenCL.

OpenCL and the OpenCL logo are trademarks of Apple Inc. used by permission by Khronos.

* Product is based on a published Khronos Specification, and has passed the Khronos Conformance Testing Process. Current conformance status can be found at