This design example shows the Hardware Abstraction Layer (HAL) software device driver development process for the UART. Using the Intel® Nios® II Embedded Evaluation Kit (NEEK), Cyclone® III Edition as the hardware platform, this example shows the various software development stages needed to develop a HAL software device driver for Nios II embedded processor.
Hardware Design Specifications
The hardware design used in this example targets NEEK, Cyclone® III Edition. Key peripherals in this design includes:
- Nios II/f CPU core
- VIC
- 16-kilobytes (KB) on-chip RAM
- JTAG UART
- System identification (ID)
- Interval timer
- UART
Using This Design Example
For information on how to run the design example, please refer to AN459: Guidelines for Developing a Nios II HAL Device Driver (PDF).
Download the files used in this example: an459-design-files.zip.