Article ID: 000094100 Content Type: Troubleshooting Last Reviewed: 10/17/2023

Internal Error: Sub-system: FDRGN, File: /quartus/fitter/fdrgn/fdrgn_expert.cpp, Line: 5653

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.4 and earlier, you may see this internal error during the Fitter stage. This internal error may occur when pins are not HPS EMIF pins or GPIO output pins placed in the dedicated HPS EMIF IO Bank when using the Intel® Arria® 10 SoC device. 

    Resolution

    To work around the problem, remove pins placed in the dedicated HPS EMIF IO Bank (Lane 3 of Bank 2K) when using the Intel® Arria® 10 SoC device. 

    Only use this for HPS EMIF pins or GPIO output pins.

     

    This problem is fixed beginning with the Intel® Quartus® Prime Pro Edition Software version 23.1.

    Related Products

    This article applies to 1 products

    Intel® Arria® 10 FPGAs and SoC FPGAs