Yes, when you compile a design targeting Intel® Agilex™ devices using Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier, the following issues will be seen in the All Package Pins compilation report :
1. The I/O direction of PWRMGT_SCL and PWRMGT_SDA are displayed as "output". However, this I/O direction is incorrect. They should be displayed as "bidir".
2. The pin name of the SDM pin assigned to HPS_COLD_nRESET is displayed as "HPS_COLD_RESET" and the I/O direction of this pin is displayed as "output". However, this information is incorrect. The pin name should be displayed as "HPS_COLD_nRESET" and the I/O direction should be "bidir".
These problems are scheduled to be fixed in a future version of the Intel® Quartus® Prime Pro Edition Software.
