Article ID: 000092287 Content Type: Error Messages Last Reviewed: 11/03/2022

Why does the F-Tile JESD204B Intel® Agilex™ FPGA IP fail with errors on the receiver side when performing internal and external loopback tests?

Environment

  • Intel® Quartus® Prime Pro Edition
  • JESD204B Intel® FPGA IP
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier,  the FGT Rx Adaptation is not able to take place in the internal and external loopback test, leading to test failure.

    This problem is caused by an incorrect setting in the F-Tile JESD204B Intel® Agilex™ FPGA IP.

    Resolution

    There is no workaround to date. 
    This problem is planned to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 1 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs F-Series

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