Article ID: 000091358 Content Type: Troubleshooting Last Reviewed: 03/14/2023

Why do I see the SDM_IO15 pin drive low on Intel Agilex® 7 devices?


  • Intel® Quartus® Prime Pro Edition

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software versions 22.2 and earlier, the SDM_IO15 pin on Intel Agilex® 7 devices is incorrectly configured as an input without internal pull-up by SDM firmware. In the Intel Agilex® Configuration User Guide, SDM_IO15 is defined as AS_nRST, which should connect to the reset pin of QSPI flash devices.


    Generally, these flash devices have an internal pull-up resistor on the reset pin. In such a scenario, you might not observe issues.

    However, if you bridge the SDM_IO15 pin by a buffer without a pull-up feature, you might observe the AS_nRST is kept low, and the flash is kept in reset status.




    To work around this problem, you need to have a pull-up resistor on board to pull the SDM_IO15 pin to VCCIO_SDM.

    This problem is fixed starting with the Intel® Quartus® Prime Pro Edition Software version 22.4.

    Related Products

    This article applies to 1 products

    Intel Agilex® 7 FPGAs and SoC FPGAs