Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier, the F-Tile Low Latency Ethernet 10G MAC Intel® FPGA IP Design Example TCL script fails to run with the error message as shown below.
error: open_service: Path cannot be found
while executing
"open_service master $port_id"
(procedure "reg_write" line 4)
invoked from within
"reg_write $PHY_IP_BASE_ADDR $PHY_USXGMII_CONTROL_REG [expr (($restart_an_value << $PHY_USXGMII_RESTART_AN) | ($speed_value << $PHY_USXGMII_SPEED) | ($..."
To work around this problem in the Intel® Quartus® Prime Pro Edition Software version 22.3 and earlier, the hardware test TCL scripts need to be updated and the correct JTAG ID needs to be set during the hardware test.
The steps are shown below.
1. Before the hardware test is started, replace the files and folders in <example_design>/LL10G_10G_USXGMII/hwtesting/system_console_fm using system-console-fm.zip.
2. Initialize the design by running the command: source main.tcl
3. A list of available JTAG masters is displayed. By default, the first JTAG master is selected. To select the JTAG master for Intel Agilex® devices targeted forIntel Agilex® I-Series FPGA Transceiver-SoC Dev Kit, run the command: set_jtag <JTAG Master>.
Example: set_jtag 1
4. The hardware test is ready to run for this design example.
This problem is fixed in the 22.4 release of the Intel® Quartus® Prime Pro Edition Software.