Article ID: 000089844 Content Type: Troubleshooting Last Reviewed: 03/04/2022

Why do I see bandwidth decrement in multi-channels DMA testing with the Multi Channel DMA Intel® FPGA IP for PCI Express ?

Environment

  • Intel® Quartus® Prime Pro Edition
  • Intel® Wharf Rock Avalon-ST for PCI Express
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    Description

    Due to a problem in the Intel® Quartus® Prime Pro Edition Software version 21.3 and earlier, the bandwidth figure reported by the software driver shipped with the Multi Channel DMA for PCI Express Intel® FPGA IP Design Example may decrement in multi-channels testing.

    Resolution

    This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

    Related Products

    This article applies to 5 products

    Intel® Agilex™ 7 FPGAs and SoC FPGAs
    Intel® Stratix® 10 DX FPGA
    Intel® Stratix® 10 GX FPGA
    Intel® Stratix® 10 MX FPGA
    Intel® Stratix® 10 TX FPGA

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