Article ID: 000089524 Content Type: Connectivity Last Reviewed: 02/08/2022

Why does the Intel® Quartus Prime Pro Edition Software suggest connecting VREF pins to GND when implementing a DDR3 interface in Intel® Stratix® 10 devices?

Environment

Bug ID: 2205893825

Quartus Edition

Intel® Quartus® Prime Pro Edition

Version Found: 18.1

FPGA Intellectual Property

External Memory Interfaces Intel® Stratix® 10 FPGA IP

Version Found: 18.1

BUILT IN - ARTICLE INTRO SECOND COMPONENT

Description

Starting from Intel® Quartus® Prime Pro Edition Software version 18.1, DDR3 IP implemented in Intel® Stratix® 10 devices will reference an internally generated VREF.

Resolution

The resepective VREF pins can be connected to GND

Description
Resolution

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