Article ID: 000088942 Content Type: Troubleshooting Last Reviewed: 01/09/2023

Why does the F-Tile Ethernet Intel® FPGA Hard IP Design Example fail to pass 100% of packets when the “MAC Client Loopback Mode” button is selected in the Ethernet Toolkit?

Environment

    Intel® Quartus® Prime Pro Edition
    Interfaces
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Description

Due to a problem in the Intel® Quartus® Prime Pro Edition Software v21.3, the F-Tile Ethernet Intel® FPGA Hard IP design example cannot pass 100% of packets when using the “MAC Client Loopback Mode” in the Ethernet Toolkit.

Resolution

There is no workaround for this problem in version 21.3. 

This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition Software.

Related Products

This article applies to 1 products

Intel Agilex® 7 FPGAs and SoC FPGAs I-Series

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