Article ID: 000088121 Content Type: Connectivity Last Reviewed: 01/10/2023

Why are the E-Tile Transceiver Native PHY IP rx_parallel_data bits missing in the PAM4 mode?

Environment

BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description

You may observe missing E-Tile Transceiver Native PHY IP rx_parallel_data bits in the PAM4 mode if you don’t run the initial adaptation during the PMA bring up flow.

Resolution

To work around this problem, run the initial adaptation before operating E-Tile receiver channels. For more information, refer to the PMA Bring up Flow section in the E-Tile Transceiver PHY User Guide.

Related Products

This article applies to 4 products

Intel® Stratix® 10 DX FPGA
Intel® Stratix® 10 MX FPGA
Intel® Stratix® 10 TX FPGA
Intel® Agilex™ 7 FPGAs and SoC FPGAs F-Series

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