Description
Due to a problem in the Intel® Quartus® Prime Pro Edition software version 19.3, you may see this internal error during the synthesis stage of compilation when none of PLL reference clock input is connected. This problem occurs when compiling for Intel® Stratix® 10 devices.
Resolution
To work around the problem, make sure the reference clock input is connected.
This problem is scheduled to be fixed in a future release of the Intel® Quartus® Prime Pro Edition software.
