Article ID: 000086601 Content Type: Troubleshooting Last Reviewed: 05/19/2021

Is there any change in the Intel® Stratix® 10 / Intel® Agilex™ Smart VID PMBus Slave Mode handshake flow in Intel® Quartus® Prime Pro Edition software version 21.1?

Environment

  • Intel® Quartus® Prime Pro Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Yes, in the Intel® Quartus® Prime Pro Edition software version 21.1, the behavior of the PWRMGT_ALERT signal in the handshake flow for Intel® Stratix® 10 / Intel® Agilex™ Smart VID PMBus Slave Mode has been changed.

    This signal will be asserted in the first configuration cycle to inform the PMBUS master that a voltage change is required.

    If you perform a second or subsequent configuration without a power cycle, the PWRMGT_ALERT signal will not be asserted if the bitstream has the same VID setting specified in the Intel Quartus Prime project and the same configuration firmware.

    The PWRMGT_ALERT signal will still be asserted when there is any I2C/PMBus error. It will not be asserted during Partial Reconfiguration.

    Resolution

    Starting with the Intel® Quartus® Prime Pro Edition software version 21.2, the PWRMGT_ALERT signal will be asserted for the first configuration and subsequent configuration as per behavior prior in the Intel® Quartus® Prime Pro Edition software version 20.4 and earlier.

    Ensure the PMBus master adheres to the latest handshake flow available in the Intel® Stratix® 10/Intel® Agilex™ Power Management User Guide 

    Intel® Stratix® 10 Power Management User Guide

    Intel® Agilex™ Power Management User Guide

    Related Products

    This article applies to 2 products

    Intel® Stratix® 10 FPGAs and SoC FPGAs
    Intel® Agilex™ 7 FPGAs and SoC FPGAs

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