Article ID: 000086464 Content Type: Troubleshooting Last Reviewed: 01/26/2018

cv_5v4 Cyclone V Hard Processor System Technical Reference Manual --> Errata

Environment

Bug ID: FB: 503592;

Quartus Edition

Intel® Quartus® Prime Pro Edition

Version Found: 17.1

FPGA Intellectual Property

Arria® V Cyclone® V Hard Processor System Intel® FPGA IP

Version Found: 17.1

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Description

In version 2018.01.26 of cv_5v4 Cyclone V Hard Processor System Technical Reference Manual, page 22-53 incorrectly show cpr register bits 23:16 description and reset value. The correct reset value of these bits is 0x08, representing FIFO Depth of 128 bytes.

This error will be corrected in future release of the technical reference manual.

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