Article ID: 000085747 Content Type: Troubleshooting Last Reviewed: 04/08/2014

Why does the Arria 10 device Transceiver PHY User Guide (PDF) describe the tx_datak signal as '1' for a data word and '0' as a control word?

Environment

  • Intel® Arria® 10 GT FPGA
  • Intel® Arria® 10 GX FPGA
  • Intel® Arria® 10 SX SoC FPGA
  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    Due to a mistake in "Table 2-40: TX Standard PCS: Data, Control, and Clocks" of the Arria® 10 device Transceiver PHY User Guide (PDF) the tx_datak signal is described as being '1' for a data word and '0' as a control word.

    The tx_datak signal should be '0' for a data word and '1' for a control word.

    Resolution

    This problem will be fixed in a future version of the Arria 10 Transceiver PHY User Guide (PDF).

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