The Quartus® II Software incorrectly generates this error if a Stratix IV GX transceiver design has transceiver channels and ATX PLL blocks connected to different blocks.
The ATX PLL block in the Stratix® IV GX device must be connected to a calibration (CAL) block to receive band gap reference currents. In some device packages, there are two CAL blocks per side. Each CAL block provides controls to specific transceiver blocks and ATX PLL blocks.
This problem will be be fixed in a future version of the Quartus II software.
To work around this error, use at least one transceiver channel that is calibrated by the same CAL block as that of the ATX PLL.
As an example, consider that you are using a EP4SGX530NF45 device. This device contains 4 transceiver blocks and two ATX PLL blocks per side. The ATX PLL R1 is calibrated by CAL block R1 and the channels GXBR0 and GXBR1 are calibrated by CAL block R0. If ATX PLL R1 is used to provide clocks to transmitter channels assigned in GXBR0 or GXBR1, the Quartus II Software generates the error. To work around the compilation error, assign a channel in transceiver block GXBR2 or GXBR3 (these two transceiver blocks are controlled by CAL block R1). You can create an additional transceiver instance, or assign an existing instance to use these transceiver blocks.