Article ID: 000085335 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Following <x> pins use on-chip clamping diodes but the I/O bank VCCIO is not 3.3V


  • PCI

    This message occurs because the Quartus® II software allows the PCI clamp diode to be enabled only for I/O pins that use a 3.3V I/O standard. 

    To work around this restriction for input pins in 2.5V I/O banks, define the pin as a 3.3V I/O standard. This is permitted because 3.3V inputs are allowed in a 2.5V I/O bank.  The software successfully compiles the design resulting in an input pin with a 2.5 V clamping diode. Altera® does not support this application because the PCI clamp diode is intended only for use in a 3.3V I/O standard. There are no plans to provide IBIS models for this implementation.

    Beginning with version 7.1, the Quartus II software message is improved for this case.


    Related Products

    This article applies to 1 products

    Stratix® II FPGAs