Article ID: 000084842 Content Type: Troubleshooting Last Reviewed: 06/19/2012

LPDDR2 Timing Closure Problem with Arria V Devices

Environment

    Quartus® II Subscription Edition
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Critical Issue

Description

This problem affects LPDDR2 products.

LPDDR2 interfaces targeting Arria V devices may not close timing.

Resolution

This issue will be fixed in a future version.

There is no workaround for this issue.

Related Products

This article applies to 1 products

Arria® V FPGAs and SoC FPGAs

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