Article ID: 000084756 Content Type: Troubleshooting Last Reviewed: 06/30/2014

What is the status of the transceiver Tx pin during device configuration and when entering user-mode on Stratix V GX devices?

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT
    Description

    On Stratix® V GX devices, 0v will be seen on the transceiver Tx pins during device configuration. When the device enters user-mode, the Tx pin will exhibit a voltage consistent with the device datasheet.

    Related Products

    This article applies to 1 products

    Stratix® V GX FPGA

    Disclaimer

    1

    All postings and use of the content on this site are subject to Intel.com Terms of Use.