Article ID: 000084434 Content Type: Troubleshooting Last Reviewed: 10/10/2011

Compilation Fails for Hard IP PCI Express MegaCore Function in Stratix IV GT Devices

Environment

  • Quartus® II Subscription Edition
  • BUILT IN - ARTICLE INTRO SECOND COMPONENT

    Critical Issue

    Description

    For designs that target Stratix IV GT devices in downbonded packages, the Quartus II software version 10.0 incorrectly places PCI Express hard IP block at the bottom transciever block, which does not include the hard IP PCI Express MegaCore function. Compilation of the design fails with a message similar to the following:

    Error: Can’t assign I/O pad <“pad name”> to <pin name> because this causes failure in the placement of the other atoms in its associated channel.

    Error: The transceiver block has no associated PCI Express hard IP block.

    This issue affects the hard IP implementation of the PCI Express MegaCore function targeting Stratix IV GT devices.

    Resolution

    The workaround is to install version 10.0 SP1 of the Quartus II software.

    This issue is fixed in version 10.0 SP1 of the Quartus II software.

    Related Products

    This article applies to 1 products

    Stratix® IV FPGAs

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