Article ID: 000083464 Content Type: Troubleshooting Last Reviewed: 09/11/2012

Why does Quartus II software version 4.0 allow the weak pull up resistor assignment to be made on CLK[1, 3, 4, 5, 6, 7, 8, 10, 12, 13, 14, 15] input pins in Stratix devices without providing a compilation error?

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BUILT IN - ARTICLE INTRO SECOND COMPONENT
Description The weak pull up resistor option is not supported on any of the CLK[0..15] input pins in Stratix® devices. The project will compile in Quartus® II software version 4.0 with the weak pull up resistor assignments defined in the Assignment Editor, but there will not be any connection in the device from the CLK[0..15] input pins to a weak pull up resistor.

Related Products

This article applies to 1 products

Stratix® FPGAs

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